Hardware Design

Retargetable Code Generation Based on Structural Processor Descriptions

Computer Hardware / Data Structure / Hardware Design / Code Generation / Behavior Modeling / Embedded processor / Design Automation / Embedded System / Structural model / Software Synthesis / Embedded processor / Design Automation / Embedded System / Structural model / Software Synthesis

EFFICIENT SIGNAL PROCESSING USING SYNTACTIC PATTERN RECOGNITION METHODS

Signal Processing / Hardware Design / Signal and Image Processing / Syntactic Pattern Recognition / Field Programmable Gate Array / Real Time / Data representation / Electrocardiogram / Natural language interface / Source Code / Hardware Implementation of Algorithms / Real Time / Data representation / Electrocardiogram / Natural language interface / Source Code / Hardware Implementation of Algorithms

EFFICIENT SIGNAL PROCESSING USING SYNTACTIC PATTERN RECOGNITION METHODS

Signal Processing / Hardware Design / Signal and Image Processing / Syntactic Pattern Recognition / Field Programmable Gate Array / Real Time / Data representation / Electrocardiogram / Natural language interface / Source Code / Hardware Implementation of Algorithms / Real Time / Data representation / Electrocardiogram / Natural language interface / Source Code / Hardware Implementation of Algorithms

An efficient hardware design for intra-prediction in H.264/AVC decoder

Video Compression / Image coding / Hardware Design / Algorithm Design / Digital Video / Very high throughput / Hardware Implementation of Algorithms / Intra Prediction / Very high throughput / Hardware Implementation of Algorithms / Intra Prediction

Tunable and Energy Efficient Bus Encoding Techniques

Distributed Computing / Energy Consumption / Computer Hardware / Computer Software / Hardware Design / Power Consumption / Experimental Evaluation / Energy efficient / Power Reduction / Embedded System / Power Consumption / Experimental Evaluation / Energy efficient / Power Reduction / Embedded System

A visual design environment

Graphic Design / Visual Design / Hardware Design / Design Methodology / Graphical Programming

Retargetable code generation based on structural processor description

Computer Hardware / Data Structure / Hardware Design / Code Generation / Behavior Modeling / Embedded processor / Design Automation / Embedded System / Structural model / Software Synthesis / Embedded processor / Design Automation / Embedded System / Structural model / Software Synthesis

Efficient utilization of scalable multipliers in parallel to compute GF(p) elliptic curve cryptographic operations

Hardware Design / Elliptic Curve Cryptography / Design and Implementation / Elliptic curve cryptosystem

Customizable elliptic curve cryptosystems

Distributed Computing / Computer Hardware / Cryptography / Field-Programmable Gate Arrays / Hardware Design / Software Implementation / Field Programmable Gate Array / Public key cryptography / Galois Fields / Hardware Implementation of Algorithms / Elliptic Curve Cryptography / Finite Field / Electrical And Electronic Engineering / Parallel Architecture / Elliptic curve cryptosystem / Parametric Model / Software Implementation / Field Programmable Gate Array / Public key cryptography / Galois Fields / Hardware Implementation of Algorithms / Elliptic Curve Cryptography / Finite Field / Electrical And Electronic Engineering / Parallel Architecture / Elliptic curve cryptosystem / Parametric Model

Retargetable code generation based on structural processor description

Computer Hardware / Data Structure / Hardware Design / Code Generation / Behavior Modeling / Embedded processor / Design Automation / Embedded System / Structural model / Software Synthesis / Embedded processor / Design Automation / Embedded System / Structural model / Software Synthesis

A visual design environment

Graphic Design / Visual Design / Hardware Design / Design Methodology / Graphical Programming

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